diff --git a/arch/arm64/boot/dts/206B1/atoll.dtsi b/arch/arm64/boot/dts/206B1/atoll.dtsi
index 034ea2f91ffa..c8b202cf9f60 100644
--- a/arch/arm64/boot/dts/206B1/atoll.dtsi
+++ b/arch/arm64/boot/dts/206B1/atoll.dtsi
@@ -839,6 +839,7 @@
 		clock-names = "core_clk";
 
 		qcom,coresight-jtagmm-cpu = <&CPU1>;
+		status = "disabled";
 	};
 
 	jtag_mm2: jtagmm@7240000 {
@@ -850,6 +851,7 @@
 		clock-names = "core_clk";
 
 		qcom,coresight-jtagmm-cpu = <&CPU2>;
+		status = "disabled";
 	};
 
 	jtag_mm3: jtagmm@7340000 {
@@ -861,6 +863,7 @@
 		clock-names = "core_clk";
 
 		qcom,coresight-jtagmm-cpu = <&CPU3>;
+		status = "disabled";
 	};
 
 	jtag_mm4: jtagmm@7440000 {
@@ -872,6 +875,7 @@
 		clock-names = "core_clk";
 
 		qcom,coresight-jtagmm-cpu = <&CPU4>;
+		status = "disabled";
 	};
 
 	jtag_mm5: jtagmm@7540000 {
@@ -883,6 +887,7 @@
 		clock-names = "core_clk";
 
 		qcom,coresight-jtagmm-cpu = <&CPU5>;
+		status = "disabled";
 	};
 
 	jtag_mm6: jtagmm@7640000 {
@@ -894,6 +899,7 @@
 		clock-names = "core_clk";
 
 		qcom,coresight-jtagmm-cpu = <&CPU6>;
+		status = "disabled";
 	};
 
 	jtag_mm7: jtagmm@7740000 {
@@ -905,6 +911,7 @@
 		clock-names = "core_clk";
 
 		qcom,coresight-jtagmm-cpu = <&CPU7>;
+		status = "disabled";
 	};
 
 	qcom,msm-imem@146aa000 {
@@ -1546,7 +1553,7 @@
 	};
     //#endif /* FEATURE_OPPO_NV_BACKUP */
 	//#endif /* VENDOR_EDIT */
-	
+
 	pil_modem: qcom,mss@4080000 {
 		compatible = "qcom,pil-tz-generic";
 		reg = <0x4080000 0x100>;